Joinwin Industrial Development Ltd

• MOQ 1 Piece(s)

We are offering tablet pc 7" mid android2.2(3g, call.bluetooth, gps)- tp003 1, system: android 2.2 2.cpu : qualcomm msm 7627 arm11 3.memory : 512m ddr2 4.system memory: nand flash 4gb 5.display: 800*480hd lcd screen 6.touch screen: capacitive multi-point, 7 inch 7.wifi: csr 6658 support 802.11b/g/n , highest transfer 300mbps, support wapi wireless protocol standard 8.bluetooth: bluetooth2.1 9.internal gps: yes 10.3g: standard mini pcie interface, support cdma evdo wcdma and td-s cdma, support 3g camera calling 11.motor: yes 12.tf slot: support tf slot, up to 32gb tf 13.camera: support double camera, front: 0.3 m pixels , back : 2.0m pixels 14.i/o interface: 1 earphone interface, 1 usb:usb high speed, 2.0 interface, 1 dc power point, 1 tf slot, 1 built-in microphone hole, 1 sim card slot 15.gravity sensor: 3 axis 16.voice: hd audio, with built-in 2 stereo speakers support, builtin mic, 2 speakers, support aacamrmp3wmawavmidi etc 17.video: mp3/mp4/3gp/avi/rmvb/ect. 18.button control key: 1.voice (up and down) 2.switch(on and off) 3.homepage 4.enter 5.optional 19.charger: 1pcs charger , 1pcs car charger

• MOQ 1 Piece(s)

We are offering computer memory 1) ddr 400/333 & ddrii 533/667/800 & ddr3/1066/1333/1600 mhz. 2) 168/184/240-pin socket type dual in line memory module (dimm) . 3) 2.6v power supply 4) data rate: 400/333/533/667/800m1066/1333mhz/1600mhz (max). 5) 2.5 v (sstl-2 compatible) i/o for ddr I products, 1.8vpower supply for ddr ii products 6) double-data-rate architecture, two data transfers per clock cycle. 7) bi-directional, differential data strobe (dqs) is transmitted/received with data, to be used in capturing data at the receiver 8) data inputs and outputs are synchronzed with dqs. 9) dqs is edge aligned with data for read, center aligned with data for write. 10) differential clock inputs (ck and ck). 11) dll aligns dq and dqs transitions with ck transitions 12) commands entered on each positive ck edge: data and data mask referenced to both edges of dqs. 13) four internal banks for concurrent operation (component). 14) data mask(dm) for write data. 15) auto precharge option for each burst access 16) programmable burst length: 2, 4, 8 17) programmable/cas latency (cl): 3 18) programmable output driver strength: normal/weak 19) refresh cycles: (8192 refresh cycles/64ms) . 20) 7.8us maximum average periodic refresh interval. 21) posted cas by programmable additive latency for better command and data bus efficiency 22) off-chip-driver impedance adjustment and on-die-termination for better signal quality . 23) dqs can be disabled for single-ended data strobe operation 24) 2 variations of refresh 25) auto refresh 26) self refresh.