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Contact SupplierThe ALS_PCI_05 is a general purpose PCI Prototyping board with an onboard CPLD that generates required signals that permit the user to perform single cycle read write from to the users hardware, in the pass through mode.
The Add-On bus signals are also routed to a set of four external application burg strip headers. These headers can provide the designer a quick interconnection between the Add-On bus signals and test hardware in the prototyping area. The EPLD is programmed to provide sufficient number of chip selects which can be used for Add-On hardware. Read and Write signals are separately provided.
Sufficient number of ground and supply pads to the proto-typing area
Three groups of chip selects to choose from 8, 16 and 32 bit region
Provision to generate additional chip selects using available lower order demultiplexed address lines
All the Add-On signals are terminated on burg strip headers
Additional 25-pin connector provided at the card edge to terminate signals from the development area
Ready software to perform Add-On IO read and write operation from the PC end in the pass through mode