TYPICAL SPECIFICATIONS

• GFET-S10 (Die size 10 mm x 10 mm)
• Processed in Clean Room Class 1000
• Growth method: CVD synthesis
• Polymer assisted transfer
• Chip dimensions: 10 mm x 10 mm
• Chip thickness: 675 μm
• Number of GFETs per chip: 36
• Gate oxide thickness: 90 nm
• Gate oxide material: SiO2
• Dielectric Constant of the SiO2 layer: 3.9
• Resistivity of substrate: 1-10 Ω.cm

FEATURES

• Growth method: CVD synthesis
• Polymer assisted transfer
• Chip dimensions: 10 mm x 10 mm
• Chip thickness: 675 μm
• Number of GFETs per chip: 31
• Gate oxide thickness: 90 nm
• Gate oxide material: SiO2
• Dielectric Constant of the SiO2 layer: 3.9
• Resistivity of substrate: 1-10 Ω.cm
• Metallization: Au contacts
• Graphene field-effect mobility: >1000 cm2/V.s
• Dirac point: <50 V
• Minimum working devices: >75 %

FEATURES

• Growth method: CVD synthesis
• Polymer assisted transfer
• Chip dimensions: 10 mm x 10 mm
• Chip thickness: 675 μm
• Number of GFETs per chip: 27
• Gate oxide thickness: 90 nm
• Gate oxide material: SiO2
• Dielectric Constant of the SiO2 layer: 3.9
• Resistivity of substrate: 1-10 Ω.cm
• Metallization: Au contacts
• Graphene field-effect mobility: >1000 cm2/V.s
• Dirac point: <50 V
• Minimum working devices: >75 %

FEATURE

• GFET-S20 (Die size 10 mm x 10 mm)
• Processed in Clean Room Class 1000
• Growth method: CVD synthesis
• Polymer assisted transfer
• Chip dimensions: 10 mm x 10 mm
• Chip thickness: 675 μm
• Number of GFETs per chip: 12
• Gate oxide thickness: 90 nm
• Gate oxide material: SiO2
• Resistivity of substrate: 1-10 Ω.cm

FEATURES

• Growth method: CVD synthesis
• Polymer assisted transfer
• Chip dimensions: 10 mm x 10 mm
• Chip thickness: 525 μm
• Number of GFETs per chip: 12
• Gate oxide thickness: 90 nm
• Gate oxide material: SiO2
• Resistivity of substrate: 1-10 Ω.cm
• Metallization: Au contacts
• Graphene field-effect mobility: >1000 cm2/V.s
• Encapsulation: ≈200 nm glutarimide-based
• Dirac point (liquid gating): <1V
• Minimum working devices: >75 %

FEATURE

• Growth method: CVD synthesis
• Polymer assisted transfer
• Chip dimensions: 10 mm x 10 mm
• Chip thickness: 675 μm
• Number of GFETs per chip: 12 in parallel
• Gate oxide thickness: 90 nm
• Gate oxide material: SiO2
• Resistivity of substrate: 1-10 Ω.cm
• Metallization: Au contacts
• Graphene field-effect mobility: >1000 cm2/V.s
• Encapsulation: 50 nm Al2O3
• Dirac point (liquid gating): <1V
• Minimum working devices: >75 %

TYPICAL SPECIFICATIONS

• GFET-S10 (Die size 10 mm x 10 mm)
• Processed in Clean Room Class 1000
• Growth method: CVD synthesis
• Polymer assisted transfer
• Chip dimensions: 10 mm x 10 mm
• Chip thickness: 675 μm
• Number of GFETs per chip: 36
• Gate oxide thickness: 90 nm
• Gate oxide material: SiO2
• Dielectric Constant of the SiO2 layer: 3.9
• Resistivity of substrate: 1-10 Ω.cm

FEATURES

• Growth method: CVD synthesis
• Polymer assisted transfer
• Chip dimensions: 10 mm x 10 mm
• Chip thickness: 675 μm
• Number of GFETs per chip: 31
• Gate oxide thickness: 90 nm
• Gate oxide material: SiO2
• Dielectric Constant of the SiO2 layer: 3.9
• Resistivity of substrate: 1-10 Ω.cm
• Metallization: Au contacts
• Graphene field-effect mobility: >1000 cm2/V.s
• Dirac point: <50 V
• Minimum working devices: >75 %

FEATURES

• Growth method: CVD synthesis
• Polymer assisted transfer
• Chip dimensions: 10 mm x 10 mm
• Chip thickness: 675 μm
• Number of GFETs per chip: 27
• Gate oxide thickness: 90 nm
• Gate oxide material: SiO2
• Dielectric Constant of the SiO2 layer: 3.9
• Resistivity of substrate: 1-10 Ω.cm
• Metallization: Au contacts
• Graphene field-effect mobility: >1000 cm2/V.s
• Dirac point: <50 V
• Minimum working devices: >75 %

FEATURE

• GFET-S20 (Die size 10 mm x 10 mm)
• Processed in Clean Room Class 1000
• Growth method: CVD synthesis
• Polymer assisted transfer
• Chip dimensions: 10 mm x 10 mm
• Chip thickness: 675 μm
• Number of GFETs per chip: 12
• Gate oxide thickness: 90 nm
• Gate oxide material: SiO2
• Resistivity of substrate: 1-10 Ω.cm

FEATURES

• Growth method: CVD synthesis
• Polymer assisted transfer
• Chip dimensions: 10 mm x 10 mm
• Chip thickness: 525 μm
• Number of GFETs per chip: 12
• Gate oxide thickness: 90 nm
• Gate oxide material: SiO2
• Resistivity of substrate: 1-10 Ω.cm
• Metallization: Au contacts
• Graphene field-effect mobility: >1000 cm2/V.s
• Encapsulation: ≈200 nm glutarimide-based
• Dirac point (liquid gating): <1V
• Minimum working devices: >75 %

FEATURE

• Growth method: CVD synthesis
• Polymer assisted transfer
• Chip dimensions: 10 mm x 10 mm
• Chip thickness: 675 μm
• Number of GFETs per chip: 12 in parallel
• Gate oxide thickness: 90 nm
• Gate oxide material: SiO2
• Resistivity of substrate: 1-10 Ω.cm
• Metallization: Au contacts
• Graphene field-effect mobility: >1000 cm2/V.s
• Encapsulation: 50 nm Al2O3
• Dirac point (liquid gating): <1V
• Minimum working devices: >75 %